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Microchip Technology /ATSAME70Q20 /TC0 /TC_CHANNEL[2] /CCR

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Interpret as CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLKEN)CLKEN 0 (CLKDIS)CLKDIS 0 (SWTRG)SWTRG

Description

Channel Control Register (channel = 0)

Fields

CLKEN

Counter Clock Enable Command
CLKDIS

Counter Clock Disable Command
SWTRG

Software Trigger Command

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data